- To reduce the number of design revisions and thus the dollar and time costs that would result from unnecessarily taping out new photomasks.
- To improve the quality of final simulation in the design phase by reconciling the device characterization data from prototype IC fabrication with the expected distributions.
For example, the tolerances of the testing equipment need to be taken into account relative to the tolerances of the design. Complicating matters is the fact that as ICs go to smaller line widths, voltages are dropping. Measuring smaller and smaller signals at higher and higher speeds makes it more difficult to trade off the tight tolerances and faster throughputs in the test and measurement equipment.
Consequently, the interaction between IC design and test and measurement becomes a complex set of tradeoffs that are not easily accomplished by isolated groups. As a matter of fact, in this era of the globalized, "disintegrated" semiconductor supply chain, most post-tapeout activities are implemented by a number of isolated groups-design, product, test, quality, reliability, packaging and manufacturing engineers. Integrating these groups into a collaborative effort is one of the major benefits Web-based engineering decision support tools can provide.
Getting ready for first silicon involves numerous activities to create a test solution. These include: vector verification and translation, generation of characterization, production and QA test programs, and load board design.
Testing these first split lots involves characterization testing of wafers, characterization testing of packaged parts, and debugging and optimization of production test programs and load boards. Other activities include electrostatic discharge (ESD) testing and data analysis; operating life testing and data analysis; generation of characterization, reliability and ESD reports; and presentation of reports to QA, design, marketing and manufacturing for approval before ramping up to volume production.
During design verification, product and test engineers debug prototypes and characterize parts according to an agreed-upon characterization plan. However, characterizing a new device produces millions of data points, leading to a lengthy process of data collection and analysis from which a variety of reports will need to be quickly produced by the various engineering groups involved.
Characterization Tools and Hardware from RTIRTI’s Vast Selection of Characterization Sockets families, features can include:
- Probe Pitches as small as 0.3mm
- Custom Footprints & Mounting to Existing Devices, Matching Footprints to existing hardware installed
- Double Sided Test Application( POP) Style packages
- Multiple Lid Styles Available
- Very Low Profile Lids for Micro Probing and SEM
- Open Socket Bases for back-side emission
- Low-inductance pins for RF characterization and test
- High force pins for lead free packages and or Matte Tin applications
- Development of Pockets under sockets for component placements
- Dual side Characterization testing